Luc-André Gregoire

Modular Multilevel Converters Over-Voltage Diagnosis and Remedial Strategy During Blocking Sequences

Publication date : Sep 2014
Paper File : Modular Multilevel Converters Over Voltage Diagnosis and Remedial Strategy During Blocking Sequences.pdf



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Author(s)

Wei Li, Luc-André Gregoire, Lennart Ängquist, Kamal Al-Haddad, Handy Fortin Blanchette, Antonios Antonopoulos,

Abstract

In this paper the authors first highlight an existing over-voltage phenomenon that is inherent to the Modular Multilevel Converter (MMC) topology. The latter occurs during the blocking sequences of semiconductor devices if the converter needs to be stopped due to circulating current, loss of control or unexpected faults. An analysis based on time domain expressions describing each operating sequence during normal and faulty blocking conditions is used to demonstrate the origin of this over-voltage. Thereafter, system behavior is obtained when devices gating signals are withheld as well as the exact over-voltage cause. Real-time simulation, with sub-microsecond time-steps, and experimental results validate the over-voltage phenomena and the proposed remedial strategy to avoid uncontrolled faulty conditions.

Modular Multilevel Converter Model Implemented in FPGA for HIL Test of Industrial Controllers

Publication date : Aug 2014
Paper File : Modular Multilevel Converter Model Implemented in FPGA for HIL Test of Industrial Controllers.pdf



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Author(s)

Wei Li, Sisounthone Souvanlasy, Pierre-Yves Robert, Luc-André Gregoire, Jean Bélanger,

Abstract

Since Modular Multilevel Converters (MMC) have a sophisticated control, the real time simulation platform becomes critical for hardware-in-the-loop (HIL) test of the actual controllers in various scenarios before commissioning. This paper presents a multi-rate real time simulator that is able to simulate electromagnetic transients of MMC systems and connect to industrial controllers through fiber optics and copper wires for HIL tests. The MMC is implemented in field-programmable gate array (FPGA) with a sub-μs time step and the rest of the power system is simulated in the central processing unit (CPU) with a time step of 10~50 μs. Input and output (I/O) drivers are implemented in the same FPGA for a fast-rate and low-latency communication. Each FPGA accommodates up to 1530 sub-modules (SM), and multiple FPGA connected to one simulator can simulate MMC with more SM and multi-MMC systems. The performance is demonstrated in a 1500-SM MMC study case.

Modular-Multilevel-Converter Dynamic Analysis and Remedial Strategy for Voltage Transients During Blocking

Publication date : Sep 2013
Paper File : Modular Multilevel Converters Dynamic Analysis 2colones.pdf



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Author(s)

Luc-André Gregoire, Handy Fortin Blanchette, Wei Li, Antonios Antonopoulos, Lennart Ängquist, Kamal Al-Haddad,

Abstract

This paper proposes a thorough analysis of the blocking sequence for modular multilevel converters in order to avoid fast voltage transients; such transients increase the stress on the different components of the converter. An issue was identified for this topology when blocking all the semiconductor devices. Under certain circumstances, unconditional blocking can result in an over-voltage on the dc bus, or across the inductors. The issue is studied using analytical equations and experimental results. A new controlled-blocking scheme is suggested in order to avoid this problem, and supporting real-time simulation results are provided.

Modeling and Control of a Full-Bridge Modular Multilevel STATCOM

Publication date : Feb 2012
Paper File : PES12_MMCSTATCOM.pdf



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Author(s)

Jean Bélanger, Wei Li, Luc-André Gregoire,

Abstract

Due to its unique topology, the Modular Multilevel STATCOM has many advantages but requires a sophisticated controller and puts higher requirements on simulation tools. To simulate the STATCOM in real-time is preferable because it enables hardware-in-the-loop test of the system in various scenarios including extreme fault conditions, which cannot be tested on a real STATCOM. This paper presents a model of full-bridge sub-module which enables fast offline and real-time simulation of the STATCOM. A control scheme with a new SM capacitor voltage balancing method is also proposed in this paper. The model and the controller are investigated for different operating conditions. Implemented in a real-time simulator, the model can be simulated in real time at a time step of 20 µs, 131 times faster than its reference model. As demonstrated by the results, the proposed control scheme is effective and robust.

Control and Performance of a Modular Multilevel Converter System

Publication date : Aug 2011
Paper File : Control and Performance of a modular multilevel converter system.pdf



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Author(s)

Jean Bélanger, Luc-André Gregoire, Wei Li,

Abstract

The Modular Multilevel Converter (MMC) system has many advantages over conventional voltage source converters and therefore can be used in dc power transmission, micro grid, or renewable energy applications. While MMC’s distinctive topology offers many new features, it also necessitates a sophisticated controller to deal with extra control requirements. This paper presents a control scheme with multiple control objectives required by MMC, i.e. active and reactive power control, dc voltage control, sub-module capacitor voltage control and balancing, circulating current eliminating, and zero-sequence current eliminating. The system is modeled in an electromagnetic transients program, RT-LAB, and its dynamic performance is evaluated by time-domain studies using a real-time simulator, eMEGAsim. The results show the multiple control objectives are fulfilled and the system has fast response to control command and system dynamics

Validation of a 60-Level Modular Multilevel Converter Model - Overview of Offline and Real- Time HIL Testing and Results

Publication date : Apr 2011
Paper File : Validation of a 60-Level Modular Multilevel.pdf



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Author(s)

Wei Li, Luc-André Gregoire, Laurence Snider, Jean Bélanger,

Abstract

In this paper, full real-time digital simulation of a static modular multilevel converter (MMC) HVDC link interconnecting two AC networks is discussed. The converter has 60 cells per arm; each cell has two power switches with antiparallel diodes and one capacitor. The simulated model can be used to study the natural rectifying mode, which is very important in the energizing process of the converter, whether a ramping voltage or a charging resistance is used. The model also incorporates a simple controller to show the system behavior in different operating conditions. The converter model and the controller are simulated on two independent real-time simulators and connected though their respective IO and physical signal cables to perform Hardware-in-the-Loop testing. All capacitor voltages are supplied to the controller using digital to analog converters. Firing signals from the controller are sent using digital signals with opto-couplers, as would be the case with a real setup. By doing so, a Hardware-in-the-Loop (HIL) simulation is obtained. The main challenges of this setup are the very high number of IOs, which reaches over 730, considering both controller and converter, and the processing power required to simulate the 360 cells within a small time-step of 50 μs or less, as required for electromagnetic transient analysis. The simulation is achieved with a time-step of 20 μs using 10 INTEL 3.2-Ghz processor cores. Different faults are applied to determine their effects on the controller and the converter. In order to produce results that are as realistic as possible, a saturable transformer is used; the impact is particularly noticeable during faults and unbalanced load. The real-time digital simulator used is based on MATLAB, SIMULINK, SimPowerSystems and eMEGAsim.

Solvers for Real-Time Simulation of Bipolar Thyristor-Based HVDC and 180-cell HVDC Modular Multilevel Converter for System Interconnection and Distributed Energy Integration

Publication date : Feb 2011
Paper File : CiGRE_Recife2011_paperfinal.pdf



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Author(s)

Luc-André Gregoire, Jean Bélanger, Christian Dufour,

Abstract

Thyristors-based converters are still today the most common type of HVDC links. Modular Multilevel Converter based HVDC links are often considered for lower power rating projects like off-shore wind farms. Both approaches present challenges in both the design and the testing of proposed circuit topologies and control & protection system design. Conventional real-time simulators used by most power electronic system manufacturers for testing thyristor-based AC-DC converter systems in HIL mode encounter difficulties or simply cannot simulate MMC-based circuits composed very large number of fast power electronic devices. This paper will demonstrate new solvers methods adapted for both thyristors and MMC-based HVDC links. In the case of thyristors-based HVDC, a new solver called State-Space Nodal implements an efficient real-time method to deal with the numerous switched filter banks and valves groups found in these apparatus. The real-time and parallel simulation of Modular Multilevel Converters with hundreds of switches, which is very difficult or impossible with conventional solvers, is made with a pragmatic fixed-causality solver. System transients and dynamic performance under several operating conditions evaluated in HIL mode with a prototype controller-in-the-loop composed of several hundred of I/O connections will also be presented, using the RT-LAB real-time digital simulator.

Today’s Power System Simulation Challenge: High-performance, Scalable, Upgradable,Affordable COTS-Based Real-Time Digital Simulators

Publication date : Dec 2010
Paper File : India Conference 2011_LAG_final.pdf



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Author(s)

Luc-André Gregoire, Laurence A. Snider, Jean Bélanger, Girish Nanjundaiah,

Abstract

This paper describes today's power system simulation challenge. Simulator technology has evolved from physical/analogue simulators (HVDC simulators, TNA’s) for electromagnetic transients and protection and control studies, to hybrid TNA/Analogue/Digital simulators with the capability of studying electro-mechanical transient behaviour [1], to fully digital real-time simulators. Today’s global power system infrastructure is rapidly changing towards increasingly distributed generation/distribution systems, and this transformation mandates expanded use of power electronic devices: HVDC, FACTS and interfacing devices for dc and variable-frequency power sources (photovoltaic, wind generation).

Hardware-in-the-Loop (HIL) to reduce the development cost of power electronic converters

Publication date : Jan 2011
Paper File : IICPE2010-HIL_multilevel_rectifier.pdf



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Author(s)

Luc-André Gregoire, Kamal Al-Haddad, Girish Nanjundaiah,

Abstract

This paper proposes a validation methodology for implementing solutions to challenges involved with power electronic converter design. Typically, the design process consists of first simulating the converter and then implementing it on hardware. Here, an intermediate step is added where the controller is connected to a real-time simulator before being connected to real hardware. This allows for virtual testing of scenarios that cannot be conducted with physical hardware without risking damage to the hardware. This technique will be demonstrated by implementing a new method of control, the drifting PWM, for a multilevel packed U-cell (PUC) converter. The drifting PWM allows for a slight variation in the switching state so that regulation of the auxiliary capacitor can be achieved. This method will be simulated offline and in real-time to demonstrate its long term reliability. Once fully functional, the controller is implemented on an FPGA board, from which it will control the real converter. Simulation results, as well as experimental results, are presented and compared. It is demonstrated that the HIL technique is a very effective tool for designing multilevel converter controllers.

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