Publication date : Oct 2007
Paper File :
vppc_paper_f.pdf
Author(s)
Tetsuhiro Ishikawa,
Simon Abourida,
Jean Bélanger,
Christian Dufour,
Abstract
This paper presents technologies designed for Hardware-In-the-Loop testing of modern motor drive systems commonly found in electric vehicles. Deliverable with the RT-LAB simulator comes various motor drive models with different precisions and complexities, from the basic Park two-axis machine models to detailed Finite-Element-Analysis based models. The former is more rapid while the latter is more precise. These models can be implemented on different hardwares, CPU or FPGA. CPU-based implementation rely on well-known ‘C’ code generation techniques and is rather flexible. FPGA implementation breaks through common limitations of CPU-based implementation by allowing much faster analog output rates, higher PWM frequencies and smaller model latencies. An FPGA implementation also allows the user to model fast protection schemes found on commercial drives (ex: over-current protections).
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eDRIVEsimeMEGAsimRT-LAB Professional