IICPE 2011 - India International Conference on Power Electronics
Event Information
Start Date: 28/Jan/2011
End Date: 01/30/2011
Location: Netaji Subhas Institute of Technology, Delhi, India
Link: http://www.iicpe2010.org/new1/
Technical Papers Presented By Opal-RT
Hardware-in-the-Loop (HIL) to reduce the development cost of power electronic converters Paper has been accepted for IICPE 2011 - India International Conference on Power Electronics
This paper proposes a validation methodology for implementing solutions to challenges involved with power
electronic converter design. Typically, the design process consists of first simulating the converter and then implementing it on hardware. Here, an intermediate step is added where the controller is connected to a real-time simulator before being connected to real hardware. This allows for virtual testing of
scenarios that cannot be conducted with physical hardware without risking damage to the hardware. This technique will be demonstrated by implementing a new method of control, the drifting PWM, for a multilevel packed U-cell (PUC) converter.
The drifting PWM allows for a slight variation in the switching state so that regulation of the auxiliary capacitor can be achieved. This method will be simulated offline and in real-time to demonstrate its long term reliability. Once fully functional, the controller is implemented on an FPGA board, from which it will control the real converter. Simulation results, as well as experimental results, are presented and compared. It is demonstrated that the HIL technique is a very effective tool for designing multilevel converter controllers.
