What is the Multi-processor architecture (features, capabilities, etc)?
- Real-time target computer using server-grade standard motherboard equipped with the latest INTEL or AMD multi-core processors, whichever has the fastest debending at delivery time
- Two hexa-core high-end 3.33 GHz CPUs per real-time computer target,
- Very fast 12 Mbytes cache memory shared by all processor cores
- Therefore, twelve (12) 3.33-Ghz CPU per real-time computer target interfaced by , on-chip and onboard shared memory
- Up to 8 real-time computers can be interconnected using a very fast PCI Express switch (10 Gbits/s simultaneously)
- Therefore 96 3.33-GHz processors can be interconnected
- Each processor can communicate directly with any processor using shared-memory or the PCI Express switch
- I/O System
- Each real-time computer can be connected to up to eight I/O systems (256 DIO or 128 analog channels and one FPGA per I/O system) using a PCI Express switch (40 Gbits/s)
- The FPGA located on each I/O system can send and receive data by Direct Memory Transfer to and from each processor core without any intervention form the processor
- Processor cores can make the model calculation while the I/O data are transferred to the FPGA I/O processors
- each I/O system (FPGA plus analog converters and signal conditioning boards) can be installed remotely in manufacturer controller racks and interfaced to the real-time target computer with fiber optic links
- FPGA Programming
- The FPGA I/O processor can be user-programmed using the SIMULINK and XILINX System Generator Tool to implement special custom models, controllers and protection algorithms or signal processing
- FPGA codes are provided for standard I/O functions like PWM, time stamping...
