RT-LAB XSG: Xilinx FPGA System Generator - Features

Allows for FPGA target code to be included as part of a larger real-time simulation model.
Handles the model C code generation via Real Time Workshop (RTW) and the FPGA HDL code generation via XSG transparently.
Loads the generated bitstream on the hardware during the loading of the real-time model.
The RT-LAB XSG is a system level modeling tool that facilitates FPGA hardware design for those that are not FPGA experts. Xilinx System Generator is an add-on to Simulink developed by Xilinx.