RT-LAB TestDrive

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FPGA-Based I/O Modules

BASE MODULE Digital Controller for the Simulator Power moding circuitry that drives the power bus Communications hub between target PC and all other modules Serial interface to support the connection of serial tools to the ECU Signals can be monitored through faceplate connections (Jack, D-type and BNC connections) SignalWire interface
PULSE DRIVE LOAD (PDL) MODULE ECU command capture 40 standard channels connecting with IGN1 or GND as rail and loads ranging from 330 to 10.0kohm 10 flexible channels with selectable rail voltage sources including external bias 4 bipolar channels with selectable rail voltage sources including external bias SignalWire interface
SWITCH MODULE Sensor simulation 30 standard channels connecting with IGN1 or GND as rail voltage 5 flexible channels with selectable rail voltage sources including Vbatt, ECU 5V, IGN or external bias 8 rotary switch channels with selectable rail voltage sources including Vbatt, ECU 5V, IGN or external bias Each switch configurable as Active High, Active Low, Open Source, Open Drain SignalWire interface
REFERENCE PULSE GENERATION (RPG) MODULE Sensor simulation and ECU command capture 5 pattern output channels (0-5V) for angular position references 8 user defined generators with configurable output stage: open drain, +/-12V, 0-IGN1, 0-5V 4 variable CAM signals for variable valve timing applications 24 engine synchronous signal capture channels for spark and fuel SignalWire interface
PULSED OUTPUT MODULE (POM) Sensor simulation 24 channels with varying frequency range and output stages Adjustable AC output stage for speed sensor simulation True 0% and 100% PWM capable SignalWire interface	Awaiting Photo
RESISTIVE SENSOR MODULE Sensor simulation 12 channels with resistance ranging from 0.5 to 200kohm Software selectable termination voltage: open, ground, external bias SignalWire interface	Awaiting Photo
ANALOG SENSOR MODULE Sensor simulation 16 voltage output channels, 12-bit D/A resolution Linear output range between high and low references supplied through external bias input pins SignalWire interface	Awaiting Photo