Rapid Control Prototyping FPGA Firmware

FPGA Firmware is a technology allowing versatility and fast computation for high speed algorithms for signal processing, controls or protections.
 
It also allows compatibility with a wide variety of sensors needed for Rapid Control Prototyping (RCP) applications. Given that RCP testing activities deals with destructive devices (power electronics, electrical motors ...), the FPGA firmware also needs to show security features allowing secure test performances.
 
This section explains some of its features and a description of our generic RCP FGPA firmware. Because of the versatility of the technology, OPAL-RT can adapt this generic product on request, upon specific needs.
 
Powerful, easy-to-use and versatile architecture
MATLAB/SimulinkTM is a proven software, used for many years for control engineering, and used for many applications in the frame of Model-Based Design. OPAL-RT provides direct integration Simulink to prepare your model for real-time execution, and I/O blocksets where you can connect your control algorithm and interface it with the I/O interfaces and the RCP FPGA firmware.
From there, you can create a real-time application of the control algorithm with RT-LAB, along with a Simulink coder. This real-time executable is running on dedicated multi-CPU cores where the I/O data are exchanged between the FPGA firmware and the CPU via PCI-Express. This backbone provides high performance and low delay data exchange, yielding unprecedented cycle times, even with very large I/O counts.
The RCP FPGA Firmware is used for I/O management, calibration, synchronization and special functions that need critical timing that are not achievable with CPUs.
 
RCP I/O Connectivity
The RCP FPGA Firmware is generic and can be configured for different types of actuators and sensors signals that are generally encountered in Rapid Control Prototyping applications:
Easy Simulink interface allows Firmware I/O configuration without flashing the firmware.
Possibility to connect a wide choice of protocols used in various industries.
Analog I/O comes with a group of 16 channels and digital with a group of 32 channels, the RCP FPGA Firmware adapts to the I/O configuration chosen.
 
 
RCP FPGA firmware - protection and other specific features
The RCP FPGA firmware needs to handle the protection required when dealing with real hardware. Many features are configured for the special needs of RCP, including:
Digital OUTput / PWM OUTPUT PROTECTION: each Digital Out or PWMOut reacts to a programmed status for all simulation state modes (Run, Pause, Reset) allowing a consistent state during all execution stages and preventing hardware damage.
DEADBAND:  each paired Digital Out can be configured with a dead-band preventing oscillation or repeated activation-deactivation cycles.
PWM Commutation: different kinds of commutation are available with the PWM out for drive and power electronics controls.
PWM-synchronized ADC: ADCs can be triggered with several sources: rising or falling edge timing of PWM Output signals, other input or outputs. This solution allows very accurate sampling of motor currents, synchronized with gate firing pulses (PWM); to prevent measurement errors due to power electronics switching.