Demo | Low Voltage Ride Through (LVDT) Capability of Solar Energy Inverters Using an FPGA-based Real-Time Simulator | OPAL-RT Learning Journey

This Hardware-in-the-Loop demo consists of an inverter controller for grid-connected solar energies and an OP4510 real-time simulator. The controller, developed by the GREENLAB of Hefei University of Technology, is capable of low-voltage ride through--while the Electric Hardware Solver (eHS) is running on the OP4510, and simulates the entire grid-connected solar-energy inverter in real-time on the FPGA at a time step of less than 250 nanoseconds. The design of circuit schematic is done using the new OPAL-RT Schematic Editor. The model receives the PWM gating signals from external controller via digital inputs, and feeds the voltage and current measurement to controller via analog outputs. Also, the HIL model can perform soft-start, soft-stop or soft-reset, as well as update the PID parameters of the external controller via RS232 protocol. Therefore, users can conduct numerous tests automatically using API scripts. Particularly, the scenario features allows the user to pre-define different levels of voltage-sag or the short-circuit level of the host grid for the requirement of low voltage ride through (LVDT) tests.