Hardware-in-the-loop Simulation of MMC DC-DC Converters for HVDC Applications

High Voltage Direct Current (HVDC) grids increase the flexibility of existing AC grids and provide a solution for integrating large-scale renewable resources. Developing such HVDC grids will require advanced technology. One of these main technologies is HV DC-DC converters. The CIGRE working group WG B4.76 analysed the role of DC-DC converters in HVDC grids, evaluating their feasibility, motivations, and applications. Two converter topologies, isolated and non-isolated DC-DC converters, have been identified as benchmark topologies. They are based on Modular Multilevel Converters (MMCs). This paper explores Hardware-in-Loop (HIL) simulation of these converters. The two topologies are tested in HIL using a multi-rate time step implementation in FPGA and CPU for both normal and fault conditions. The topologies are modelled, including the dynamics and control signals for all the sub-modules. The model supports various types of submodules in the same valve and issuitable for testing converter control and detailed converter behaviour. The models are developed in RTLAB. Further, the performance of these models is validated by using a real-time simulator with an FPGAboard. The model is validated, comparing the results with an average model. The results show good accuracy for the proposed method with performance of a sub-microsecond time-step for the Sub-Modules simulation. This work provides a solution for manufacturers and operators to test DC-DC converter control using HIL. The proposed method can also be applied to other DC-DC topologies based on MMC valves.