Electric Aviation Workshop UK | BMS Development and Testing at Vertical Aerospace
Presentation, Aerospace, Hardware-In-the-Loop (HIL)
2026-09-03

Jake Paton, Powertrain Verification and Validation (V&V) Engineer, examines how Vertical Aerospace uses hardware-in-the-loop testing to investigate unexpected behaviour, exercise faults safely and support repeatable, traceable verification. The presentation also showcases how learning from prototype flight testing feeds back into laboratory models and regression tests, creating a continuous loop between real aircraft behaviour and development of the certified system. This presentation was part of the workshop Controls Development and Testing for Electrical Aviation, co-hosted by IAAPS and University of Bath at the IAAPS facility on September 3, 2026.