Closing the loop on dual active bridge converters in real time

Key Takeaways

• A dual active bridge converter has to be validated across voltage ratio, power direction, and load level because each region produces a different current pattern.
• Closed-loop switching models expose the timing, parasitics, and protection responses that average models will hide.
• Signoff is credible only when your HIL plan covers reversal, low-power corners, and off-nominal voltage ratios with repeatable evidence.

Closed-loop validation for a dual active bridge converter must cover the full operating mode map, or control faults will stay hidden until hardware test.

A dual active bridge is attractive because it gives you isolated bidirectional power flow with strong power density, but that flexibility comes with mode shifts, circulating current, and timing sensitivity that a simple average model will miss. Electric car sales passed 14 million in 2023, reaching about 18% of all car sales, which shows how much power conversion now sits inside systems that need tight control and repeatable validation. When you test a DAB converter in closed loop, the goal isn’t a nice waveform at one point. The goal is proof that your controller stays stable, efficient, and safe across the states your hardware will actually see.

A dual active bridge converter transfers power through phase shift

A dual active bridge converter moves energy between two direct current buses through two active full bridges and a high-frequency transformer. Power is set mainly by the phase shift between the bridges. You get galvanic isolation. You also inherit switching states that shape current stress, losses, and control effort.

Picture an 800 V battery pack linked to a 400 V bus through a transformer ratio chosen for the intended range. Positive phase shift sends power from the battery side to the load side. Reverse the shift and power flows back. The same hardware handles both directions, which is why you’ll see this topology in storage systems, chargers, and coupled direct current buses.

That plain description hides an important testing fact. Current shape depends on timing, leakage inductance, dead time, and bus ratio at the same time. If your model smooths the switching action away, you won’t see the regions where soft switching fades or current peaks jump. A DAB converter only looks simple when you freeze it at one neat operating point.

Operating modes shift when voltage ratio moves away from unity

Operating mode shifts start when the relation between bus voltages, transformer turns ratio, and requested power moves current away from the simple symmetric pattern. Phase shift alone no longer tells the whole story. Current can flatten, clip, or reverse within a half cycle. Soft-switching margin also shrinks as that pattern moves.

Picture the same converter at nominal voltage on both sides. Current ramps look balanced, and phase shift gives you a clean power control handle. Drop one bus as a battery discharges, and the same phase command pushes the bridges into a different current pattern. Light load makes the shift even sharper because device capacitances and dead time take a bigger share of each switching period.

That is how a dual active bridge shifts operating modes in practice. You don’t flip a labelled switch inside the hardware. The mode moves when bus ratio, requested power, and control limits push the current trajectory into another region. Your validation plan has to treat those regions as separate cases, or you’ll tune a controller that behaves well only near nominal conditions.

Control validation starts with the full operating mode map

“Control validation starts with a map of voltage ratio, power direction, and load level because each region asks the controller to solve a different timing problem.”

A DAB converter won’t behave as one uniform plant. Gains, limits, and transitions need coverage. Bench time will otherwise hide weak regions until late test.

A useful mode map puts bus-voltage ratio on one axis and transferred power on the other. Add power direction and load level, and you can mark zones where current stays monotonic, zones where it folds, and zones where soft-switching margin gets thin. A battery charger gives a clear case. High state of charge, low charge current, and an elevated grid-side bus place the controller in a very different corner than rated charge.

That map should set your test order. Start with the boundaries where a region begins or ends, because crossings will stress limits, timing logic, and current estimation. Move next to low-power cases, since soft switching often disappears there first. Only after that does the nominal point matter, because it rarely tells you what will break.

Single operating points miss the hardest DAB control problems

A single operating point can prove that the converter works, but it can’t prove that the controller is ready for service. Rated power near nominal voltage is usually the cleanest case. Current symmetry looks good there. The hardest faults sit in off-nominal corners and in transitions across zero power.

A bench test at moderate load and near-unity voltage ratio often produces the waveforms everyone wants to see. Yet the same controller can overshoot current when battery voltage falls, or chatter when power command crosses zero during regenerative braking. That gap matters because service duty cycles spend plenty of time away from the tidy centre of the map. A short checkpoint table helps keep signoff honest.

The controller should face a closed-loop switching plant

A controller should be tested against a closed-loop switching plant because average models hide the exact events that trip protection, destabilize current control, and break timing assumptions. Sampling delay matters. Pulse-width modulation granularity matters. The plant the controller sees must switch, reverse, and saturate like hardware.

A common lab surprise starts with a stable current loop in simulation and a noisy bench result after code deployment. The missing piece is often a combination of dead time, quantized phase command, measurement filtering, and bridge nonlinearity near zero current. Those details sit outside a coarse plant model. Once the controller faces a switching plant, you can watch limit logic, start-up sequencing, and fault recovery behave the way they will on the rack.

That is why bidirectional DC-DC converter HIL testing works so well for a dual active bridge. Your embedded code stays in the loop, so scheduler jitter, A/D timing, and PWM update order all count. You can inject load steps or voltage sag without risking hardware. You also get repeatability, which is hard to keep once heat and component spread start to move the bench.

Switching fidelity matters when parasitics shift converter behaviour

Switching fidelity matters because parasitics shift the current waveform enough to alter mode boundaries, soft-switching margin, and controller stability. Leakage inductance sets the slope. Device capacitances reshape commutation. Dead time steals useful control range. Small errors in the plant become big errors in the loop.

Light-load discharge shows this clearly. A command that looks harmless on a simplified model can lose zero-voltage switching once device capacitance and transformer leakage are represented, and your measured current will no longer match the controller estimate. Protection thresholds then trip earlier than expected. The issue isn’t extra detail for its own sake. The issue is that the controller is making timing choices from that waveform.

This is where OPAL-RT fits the workflow without turning the test into a modelling project. A high-speed converter solver that keeps both bridges switching and supports bidirectional state transitions lets you hold one closed-loop setup across charge, discharge, and reversal cases. Your team can stay focused on controller behaviour while the plant setup stays consistent across corners. That keeps validation focused on code, timing, and thresholds.

Test coverage must sweep voltage ratio across power flow

Test coverage has to sweep voltage ratio across both power directions because a DAB converter spends little time at a single neat ratio. Battery voltage moves. Direct current buses sag and recover. Commands cross zero. Your test matrix should follow that full path, not a narrow strip around nominal values.

Battery deployment in the power sector rose by more than 130% in 2023, with 42 GW added globally. That scale means more converters will cycle through charge, discharge, standby, and reversal every day. A useful sweep plan will include these five cases first. Each one answers a different control question.

• Charge at rated power near nominal bus ratio to verify baseline control authority.
• Charge at light power with high bus ratio to expose fading soft-switching margin.
• Discharge at rated power with low bus ratio to catch rising current stress.
• Discharge at light power near zero command to check chatter and quantization.
• Cross zero power under a step command to verify clean direction reversal.

Each case will tell you something distinct, so don’t collapse them into one averaged sweep. Capture current peak, switching margin, controller state, and protection response for every run. If one corner fails, retune on that corner before widening the matrix. You’ll reach signoff sooner with clear boundaries than with a pile of nominal plots.

Real time HIL testing supports converter signoff with confidence

Real-time HIL testing supports converter signoff when it proves the controller will survive mode edges through repeatable evidence across transitions, faults, and off-nominal ratios. You need repeatable faults, repeatable timing, and repeatable transitions. That is what closes the loop. Confidence comes from evidence across the whole map.

Good signoff feels a bit unglamorous. You set acceptance limits for current overshoot, settling time, soft-switching loss, and fault recovery, then you run them under the ugly cases the hardware will actually see. If a controller needs separate tuning tables for corners, you document that honestly. If a region stays unstable, you don’t hide it behind nominal efficiency.

Teams using OPAL-RT usually trust signoff only after one switching plant has survived bad voltage ratios, repeated reversals, and thin soft-switching margins under the same control code. That discipline takes more effort on day one. It saves weeks of bench retest later. 

“Closed-loop validation is the only credible way to test a dual active bridge across its full mode map.”