The OP5607 expansion unit was designed with the Xilinx VC707 Virtex-7 FPGA development board to provide additional signal conditioning to OPAL-RT simulators.
The FPGA, which can be programmed either through the target computer’s PCIe or via the MUlti-System Expansion link (MuSE), is used to execute models designed with OPAL-RT RT-XSG, manage I/O lines and execute embedded FPGA-based simulations.