Low voltage ride through testing for grid connected inverters

Key Takeaways

• LVRT pass and fail calls depend on the exact utility voltage against time curve, not on a generic dip test.
• Waveform fidelity, synchronized timing, and closed-loop recovery checks decide if a bench result will hold up during commissioning.
• Protection settings and measurement definitions cause many ride-through failures even when the current controller looks stable.

Ride-through compliance is only credible when a test reproduces the exact sag depth, timing, and recovery the grid code requires.

Solar and storage plants now place more inverter capacity on transmission and distribution systems, so trip behaviour during faults has become a commissioning issue. Solar PV generation reached about 1,600 TWh in 2023 after a 320 TWh rise from 2022, a 25% jump that put more inverter-based resources under scrutiny. A pass result now depends on accurate disturbance reproduction because a simplified dip can hide a control or protection weakness. If the sag profile is late or missing phase detail, the result will mislead you.

Low voltage ride through means the inverter stays connected and supports the grid through a defined voltage sag, then recovers without unstable current or nuisance tripping. Many failures come from test setup limits instead of gross control flaws. You need code shaped voltage sags, closed-loop interaction with the actual controller, and pass criteria linked to the utility curve. That combination gives you a useful answer before energization and keeps site work from turning into troubleshooting.

LVRT defines inverter behaviour during short grid faults

LVRT is the requirement that a grid-connected inverter remains connected through a defined voltage sag and follows the control response set by the grid code. It covers fault entry, the sag period, and recovery. A unit that trips early has failed. The check happens on a millisecond time scale.

A utility can require an inverter to stay online when terminal voltage drops to 0.15 per unit for 150 ms and to inject reactive current during the dip. A photovoltaic plant can pass steady state power tests and still fail this event if its synchronizing loop loses lock. The concern is a sudden loss of grid support during a system fault. Fault ride through testing has to cover the disturbance itself and the return to service.

That definition answers the common question about what low voltage ride through means for grid-connected inverters. You’re checking continuity, current control, and stable recovery in one sequence. A lab test has value only when it reproduces that whole sequence. If recovery or current response is missing, the result is incomplete.

“You’re checking continuity, current control, and stable recovery in one sequence.”

Grid code curves set the ride-through pass boundary

Ride-through compliance is judged against a voltage against time curve. The curve defines the no trip zone, the response zone, and the recovery boundary. If your test points miss those edges, you don’t know if the inverter truly passed. Pass and fail start with the curve.

One operator will accept a short drop to zero volts if the inverter remains connected for a brief clearing time. Another will hold the voltage floor higher and extend the ride through duration. Those cases stress different control loops and protection timers. You can’t swap one sag profile for another and call the result compliant.

A useful test plan maps each sag event to the exact curve segment it is meant to challenge. That gives you traceability when you review a failure near 0.2 per unit for 600 ms or a delayed return to active current. Reviewers can see which boundary failed and why. That clarity matters when utility approval depends on recorded evidence.

Ride-through compliance depends on timing as much as depth

Timing decides if the inverter sees the event the same way the grid code does. A sag that reaches the right voltage 20 ms late or recovers 30 ms early can shift the controller into a different protection path. LVRT tests are time domain tests. Depth alone won’t tell you enough.

A three-phase dip commanded at the source does not appear instantly at the inverter terminals once filters, measurement windows, and control delays enter the loop. A unit set to trip after 9 cycles below a threshold can pass one bench and fail another with the same minimum voltage. The gap comes from event timing. You need recorded terminal voltage and synchronized control signals to see it.

That is why ride-through compliance work needs millisecond alignment between the sag command, measured voltage, current injection, and protection status. If those traces are not synchronized, you can’t defend a pass result or diagnose a fail result. Teams often focus on current magnitude first. Entry and exit timing usually tells the more useful story.

Voltage sag fidelity determines whether LVRT results stay valid

Voltage sag fidelity decides if the inverter is being tested against the fault it will actually face. Depth, phase angle, sequence content, and recovery shape all matter. A coarse waveform can pass an inverter that will trip on site. Accurate sag generation keeps the result valid.

A balanced dip to 0.5 per unit is easy to script. A single-phase sag with phase angle shift and uneven recovery exposes different control behaviour. Plants that pass the balanced event can still trip when negative sequence current and measurement filters interact. Sag fidelity decides if the test is representative.

When OPAL-RT generates code-shaped sag profiles in real time, the fault waveform and controller response share the same time base. That lets you compare terminal traces directly against the utility curve instead of inferring behaviour from a simplified source command. The discussion stays focused on waveform accuracy and measured response. Faithful profiles keep pass and fail calls defensible.

Closed loop testing reveals control limits during fault recovery

Closed loop LVRT testing shows how the controller, plant model, and protection logic interact during the first cycles after fault clearance. Recovery is where current limits, DC link control, and synchronizing logic fight for priority. A simple playback test won’t expose that interaction. The bench must let the inverter push back on the simulated grid.

A storage inverter can ride through the sag itself, then trip 80 ms later when active power returns before reactive current demand collapses. That failure appears only when the current controller and grid model exchange signals in real time. Renewables supplied almost 30% of global electricity in 2023, so that recovery behaviour matters at system scale. A clean current trace during the fault does not guarantee a stable exit from the fault.

You’re looking for oscillation, overshoot, delayed resynchronization, and mode switching errors. Those issues rarely show up in specification sheets, yet they appear quickly when the plant controller, inverter, and simulated network share the same loop. Closed-loop benches also let you test weak grid cases. That shortens the path from model tuning to compliance evidence.

“A clean current trace during the fault does not guarantee a stable exit from the fault.”

Start with symmetric dips before complex fault cases

Symmetric three-phase sags should come first because they isolate baseline control behaviour before unbalance, phase jumps, and sequence effects complicate the result. You get a clean view of current limiting, protection delays, and recovery stability. Early failures are easier to explain. Complex faults make sense only after the simple case is stable.

• Run a full voltage baseline to confirm references.
• Apply a moderate three-phase sag to verify ride-through entry.
• Deepen the three-phase sag to the curve minimum.
• Add a single phase sag to check negative sequence handling.
• Finish with a recovery sweep to review settling.

A staged sequence keeps troubleshooting efficient. If the inverter trips during a moderate three-phase dip, there is no value in jumping straight to single-phase faults and long recovery ramps. The cause trail gets harder to read as you add variables. You’ll fix problems faster when the test order follows the controller logic.

Protection settings often determine inverter trips during sag events

LVRT failures often trace back to protection thresholds and timers rather than to the current regulator itself. Undervoltage pickup, DC link overvoltage, overcurrent clipping, and loss of synchronism logic all respond during a sag. If those functions are not coordinated, the inverter will trip inside the allowed ride-through zone. Compliance lives in the settings as much as in the control code.

A plant can satisfy the utility curve on paper and still disconnect because the local undervoltage timer starts at filtered phase voltage while the test report uses line-to-line terminal voltage. Another common issue appears when DC link protection reacts to a steep recovery ramp after the fault clears. The controller did its job, yet a separate limit ended the test. Trace review has to include protection flags as well as power and current.

You should document each active threshold, timer basis, and measurement point before the first formal run. That saves hours when a trip occurs near the curve edge. Teams that skip this step often chase phantom control problems. The actual fix is usually a settings review tied to the grid code measurement definitions.

Real-time simulation verifies compliance before plant energization

Pre-connection verification works when the simulator can impose the exact fault profile and record the inverter response on the same time base used to judge compliance. That turns LVRT into an engineering check. You leave the bench with evidence that can be reviewed later. Utilities and developers both need that level of proof.

A team preparing for site energization can run the required sag set, compare each trace against the utility curve, and correct timer or control issues before field crews mobilize. That avoids the expensive loop of field trips, controller patches, and repeat witnessing. Schedule risk drops because the failure mode shows up in the lab first. Good LVRT testing is pre-connection discipline.

That is the practical value of OPAL-RT. It lets you generate compliant voltage sag profiles in real time and judge inverter behaviour against the actual curve before the plant connects. Teams that treat ride-through as a measured control problem build cleaner commissioning records and spend less effort defending ambiguous test results. That record will hold up under review.