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Reference Number: AA-01047// Views: AA-01047// Created: 2015-11-05 15:36:23// Last Updated: 2015-11-05 15:36:23 Problem & Solution Problem Occured : RaiseNagsError - Invalid RT-LAB block diagram ProblemWhen compiling the model, I get the following error: ------------------- Generating rtdemo2_1_sm_controller C code -------------------- ??? Error using RaiseNagsError (line 617) Invalid RT-LAB block diagram.
Error in C:\OPAL-RT\RT-LAB\v11.0.3.467\Simulink\libR2011b\opvalidatemodel.p>opvalidatemodel (line 91)
Error in C:\OPAL-RT\RT-LAB\v11.0.3.467\Simulink\libR2011b\opVerifySendReceiveRTPriority.p>opVerifySendReceiveRTPriority (line 117)
Error in C:\OPAL-RT\RT-LAB\v11.0.3.467\Simulink\libR2011b\opMakeRTW.p>opMakeRTW (line 124)
??? Error generating C code for rtdemo2_1_sm_controller subsystem. SolutionThis type of error is related to the Simulink model. It might be related to a missing state in the subsystem. It can be solved by adding a delay in the path before the output of the subsystem. In this example, we can observe that the path input to output (shown in read) does not meet a state block before exiting the subsystem. Now, since we needed a state, we can actually use a delay that is already in the model as shown in the image below.By moving the delay to the first subsystem, the resulting model should compile without error.
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