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Reference Number: AA-01523// Views: AA-01523// Created: 2018-08-23 15:45:04// Last Updated: 2019-11-22 16:01:50 HowTo OP4520 MUSE Remote Flash Programming Procedure OverviewThis article explains how to manually flash a USER bitstream to the Xilinx Kintex 7 FPGA, onboard an OPAL-RT OP4520 expansion chassis. The flash is done via the JTAG interface on the front panel of the unit. Note that if your system was shipped from 2019 and after, then the Remote Muse simulators can be program via a Central Muse simulator if connected together via an SFP cable. Hardware and Software Tool RequirementsHardware:
Software:Procedure1. Insert the JTAG cable (figure 1) into the JTAG connector on the front panel of the OP4520 (figure 2)Figure 1: Recommended JTAG Cables Figure 2: JTAG Connector Location on OP4520 2. Power up the OP4520 (if not already up)3. Open Vivado, and from within the software:
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Manufacturer: select Spansion -
Density: select 256, -
Type: select SPI, -
Width _X1_X2_X4 -
Select Configuration Memory
part s25FL256sxxxxxx0-spi-x1_x2_x4. - Click OK
NOTE: Please use the .bin file provided to you by OPAL-RT Support. The file shown in this example: “TE0741_3-EXR-0001-3_2_0_172-16AIO_32sDIO_LEDs_SFP_Project-01-07.bin” is for indicative purposes only.
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