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Reference Number: AA-01994// Views: AA-01994// Created: 2021-02-22 19:03:18// Last Updated: 2021-02-22 21:27:04
General Article
RT-XSG : How to add FPGA SCOPE to your firmware

The FPGA Scope feature is used to visualize high-speed signals internal to the FPGA board with a sampling rate higher than the simulation step size. 

Here are some characteristics of this feature :


  • A list of signals internal to the FPGA available for acquisition is built automatically during bitstream generation and provided to the FPGA Scope.
  • From that list, the user selects a subset of signals that would be interesting to visualize during the real time simulation. This selection is performed just before loading the model onto the simulator (no need to recompile !).
  • The maximum number of signals that can be simultaneously recorded is limited and is bitstream-dependent. This limit is generally equal to 32 signals.
  • The acquisition rate can be adjusted on the fly.

In order to generate a compatible firmware with FPGA SCOPE and to used, the following software versions are needed : 


  • RT-LAB v2020.2 (+)
  • eFPGAsim v2.5.3.34 (+)
  • ScopeView license (localhost)
  • Compatible firmware generated with RT-XSG v3.3.1.719 (+)



The FPGA SCOPE feature allows you to probe the eHS, IOs and motors signals directly from the FPGA. Here are the steps you need to follow in order to add the feature to your firmware : 

STEP #1 : In the top level of your XSG model, connect the output terminal of the eHS core to the input of the following logic (in red). eHS output and IOs will be available to probe from the FPGA.




The FPGA Acquisition Probe can be found under the RT-XSG library : 




STEP #2 : If your firmware includes motors, you can add the following logic (in red) to be able to probe the motors signals from the FPGA.




The logic inside the PMSM VDQ FLWS Stream and Generic Machine FLWS Stream is the following :


STEP #3 : Save your model and open the Synthesis Manager and make sure the OPBIN output files formats is checked. You can then start the generation of your new firmware.




STEP #4 : Copy the .OPBIN file in the matlab folder, edit your model and open the OpCtrl block : 




STEP #5 : Paste the .OPBIN file name (with the extension) in the OpCtrl block and click on apply. The .OPBIN file will be automatically unpacked and you will have the .bin and .fsd that are needed to use the feature : 




If you have any question on how to use the FPGA SCOPE, please see the following RT-LAB demo example or contact the OPAL-RT Support : https://www.opal-rt.com/contact-technical-support/