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Reference Number: AA-02061// Views: AA-02061// Created: 2022-01-20 04:27:34// Last Updated: 2023-07-14 07:25:47 HowTo How to configure the "AOMR-V2" control panel block for customized applications? How to configure the "AOMR-V2" control panel block for
customized applications? For bitstream that generated with new "AOMR-V2"
block by RT-XSG, the relating "Analog Output Mapping and Rescaling V2
block Control Panel" block must be used in SC console to configure the
"Analog Output Mapping & Rescaling Controller" block in SM or SS
subsystem. The advantages of "AOMR-V2" compares to
"AOMR-V1": 1- Better stability. 2- Better usability: "AOMR-V2" offers more inputs
on the block, which making it easier to map many things, especially when you
have more than 1 eHS used in your model. For general application of "AOMR" block, please
refer to this KB: How to send Analog Out Signal using the AOMR block? This
article only focus on the configurations of "AOMR-V2" control panel
block in SC console, as the applications of "AOMR" controller block
remains not changed. Control Panel Block in Library Parameters General AOMR Version - This parameter allows to choose between the
two available versions of the AOMR block. The V1 allows to configure 1 or 2
lanes: lane 1 is parallel and lane 2 is serial. The V2 version allows to
configure from 1 to 8 serial lanes. Number of lanes - This parameter allows to choose how many
lanes to configure. If 0 is selected, only CPU inputs are available. Open Mapping Table - This button opens the Mapping Table view
where the signals assignation, gain, offset, min and max can be tuned. Lanes The number of lanes sections displayed depends on the number
of lanes parameter selected in the General box. The CPU inputs section is
always available even if 0 lanes are selected. A lane section constraints: Source - Scroll down to choose between Custom List and
Unassigned. This choice enables the Signals List. Signals List - Allows to enter the signals list going to the
lane. This list must be exhaustive, and the order of the names must match the
actual order of the signals in the wire. The relationship between the number of Lane and AOMR outputs for eFPGAsim demo bitstream are listed in the table below. Note the relationship maybe different if the bitstream is customized. AOMR Mapping Table Signal - This parameter sets the signal to be sent to the
corresponding Analog Out. Gain - This parameter sets the gain to be applied on the
selected signal. Offset - This parameter sets the offset to be applied on the
selected signal. Min (Volts) - This parameter sets the AO channel output
minimum voltage. Max (Volts) - This parameter sets the AO channel output
maximum voltage. The formula applied to the output signal is - Output AO
voltage = saturate (signal * gain + offset, min, max). Only CPU Inputs Set the With eHS Outputs Set the Note: User could modify the section of For example, if 1 eHSx128 is used in the model, the
After the modifications of
With FPGA-based Motor Outputs User should first check the type of motors that included in
the bitstream. Then add the desired variables to the The observables of each motor blocks that could be added
into the 1- Dual PMSM-SH Model: 2- Dual PMSM-VDQ Model: 3- Quad Generic Machine Model: For more information about how to generate or upgrade a bitstream with "AOMR-V2", please contact OPAL-RT support: OPAL-RT Technical Support |