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Reference Number: AA-02125// Views: AA-02125// Created: 2023-01-26 23:54:00// Last Updated: 2023-04-19 13:57:57
HowTo
How to Communicate with Different Models Running on Different Cores at the Same Time with RT-LAB

It is possible to run different models at the same time using different cores of the simulator. To do it, please follow the KB Article: How to Run Different Models on Different Cores Simultaneously at the Same Target with RT-LAB

If you intend to communicate between these models it is recommended to use the “Shared Memory” option.

To do it, place the OpSharedMemoryCtrl block in the models that will be communicating.

Additionally, you will need to use the OpSharedMemoryRead and OpSharedMemoryWrite to send/receive information between both models.

You can find more information about these blocks on the following pages:
OpSharedMemoryCtrl
OpSharedMemoryRead
OpSharedMemoryWrite

Below, an example is presented showing the communication between three models using the Shared Memory:

Display Model – Running on Core 1


Model A – Running on Core 2


Model B – Running on Core 3. In this case the enable is the opposite from the Model A, since it will write on the memory when model A is not doing it.


When using the shared memory, you don’t need to configure anything on the IO interface (Analog and Digital).


 It is important to highlight that, in this case, it is not possible to use loopback to communicate between both cores communication, since only one model can communicate with FPGAs at a time.