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Reference Number: AA-02022// Views: AA-02022// Created: 2021-06-25 11:49:39// Last Updated: 2022-01-20 02:06:33 Application HYPERSIM MMC6: Understand [CONNECTIONS_DIL] MMC_Param_Data_x_x settings in .io file Introduction:In HYPERSIM, IO Configuration and sensor management have two ways: 1. Through IO files, details refer to this KB: https://www.opal-rt.com/support-knowledge-base/?article=AA-01238 2. IO Interface OPAL-RT Board (IO GUI HYPERSIM 2019.1+): https://www.opal-rt.com/support-knowledge-base/?article=AA-01778 With provided HYPERSIM MMC6 demo model (Attached to the end of this KB) works with the first methods and it contains the following files:
Details regarding to HYPERSIM MMC and demo MMC-HVDC please refer to attached OP203_8_MMC_Hypersim_201907.pdf MMC block parameter settingsIn the HYPERSIM DEMO MMC-HVDC, MMC1 and MMC2 is distinguished through block ID and Converter ID as shown in Fig1. The block ID must be different for each MMC block. Converter refers to the MMC in the FPGA (In this demo bin, there's 2 converter/MMC programmed). Starting from 0, it refers to two converters in the same FPGA. Fig 1. MMC block ID and converter ID setting in the MMC-HVDC demo model Corespondingly, in the IO file the connections between the CPU model and FPGA is configured in the [CONNECTIONS_DIL] section: Fig 2. MMC6 HYPERSIM HVDC demo *.io file [CONNECTIONS_DIL] setting The DataInProcess follows the format of MMC_Param_Data_{BlocId}_{ConverterId*2} and MMC_Param_Data_{BlocId}_{ConverterId*2+1}. The dataInExchanger follows the format LoadIn_{ConverterId*2} and LoadIn_{ConverterId*2+1}. Example:Based on the provided model, when a 3rd MMC block is used, we need to use a second FPGA. Despite the HARDWARE_DIL/MAPPING/SENSOR_DIL need to be modified correspondingly, the MMC block ID/converter ID and the [Connections_DIL] should be changed accordingly too. For example, with a system that have energy dispation block (ED) FB-DBS in Fig. 3* and the structure of the FB-DBS (Fig.4*) is similar to a MMC. So we can modify a MMC block to create this block in the model. Fig 3*: PMSG based inland WPP using MMC-HVDC integration Fig 4*: The structure diagram of FB-DBS In this case we'll use 1 FPGA/Simulator to simulate MMC1 and the FB-DBS (use the original MMC2), another FPGA only simulate the MMC2. Then the Block ID & Converter ID for ED block is 2 and 1, which corresponding [CONNECTIONS_DIL] setting in the IO file will be: Fig 5*. [CONNECTIONS_DIL] with 3rd MMC block * Cao, Shuai, Xiang, Wang, J, 2020, Energy dissipation of MMC-HVDC based onshore wind power integration system with FB-DBS and DCCB, IET Renewable Power Generation, Vol. 14 Iss. 2, pp. 222-230
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